Below, a conventional receiving module is explained with reference to FIG. 4.
FIG. 4 is a block diagram of a conventional receiver. In FIG. 4, receiving module 103 comprises first receiver 106 and second receiver 107 for making diversity reception, and demodulator 108 including demodulating LSI and being connected to an output side of first and second receivers 106 and 107. Demodulator 108 further includes first detector 122 for detecting a level of a signal from first receiver 106 and second detector 129 for detecting a level of a signal from second receiver 107. First receiver 106 further includes first amplifier 112 for amplifying an incoming signal with reference to an AGC (Automatic Gain Control) voltage produced based on the signal level detected by first detector 122. Second receiver 107 further includes second amplifier 116 for amplifying an incoming signal with reference to an AGC voltage produced based on a signal level detected by second detector 129.
As a document of prior art relating to application of this invention, Unexamined Japanese Patent Publication No. 2004-274603 is publicly known, as an example.
With conventional receiving module 103, when receiving status of the module is switched from a single reception (non-diversity reception) where only first receiver 106 receives a signal to a diversity reception where both first receiver 106 and second receiver 107 receive, and when difference between an initial AGC voltage value and a converging value thereof is large, the module requires a long period of time, a 100 millisecond for instance, from second receiver 107 starts working till the AGC voltage supplied to second amplifier 116 is ultimately converged into a certain value.